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Scintillation Detectors integrated with Silicon Photomultiplier SiPM
The design and operation of scintillation detectors are shifting to Silicon Photomultiplier (SiPM) detectors from the traditional Photomultiplier Tube (PMT) due to the low operating voltage, insensitive to magnetic fields, mechanical robustness, and smaller size. The SiPM is a highly attractive alternative, providing all the benefits of a solid-state sensor while still achieving the low-light detection capabilities of the PMT.
Saint-Gobain Crystals has developed unique integrated solutions to truly leverage the value of SiPMs.
An underappreciated advantage of SiPMs is that they are discrete and separable, unlike monolithic PMTs. This allows for the usage of fewer SiPMs strategically placed on the crystal surface, striking a balance between system performance and cost. Saint-Gobain can optimize this balance with their experience with scintillation optics and the ability to tailor the detector assembly to match the SiPM configuration.
Features/Benefits
- Low-voltage operation - run at 5V in, and use less than 150mW
- Magnetic field insensitivity
- Mechanical robustness
- Temperature gain compensation
- Compactness - Average height reduction for a detector about 4”
- Designed for and successfully evaluated under ANSI N42.34
ANSI N42.34, 2006 Conditions: Section Temperature (-20°C to 50°C) 7.1 Humidity (to 93% relative) 7.3 Moisture & Dust 7.4 Electrostatic Discharge (up to 6kV) 8.1 RF Susceptibility (20V/m @ 80MHz to 2500MHz) 8.2
Design Options
Using our expertise in detector processing, packaging and optical analysis, Saint-Gobain has developed cost-effective solutions to provide excellent performance, including optimization of:
- Number and location of SiPMs for the required performance
- Detector packaging to match SiPM configuration
- Offer SiPM solutions on almost any geometry of scintillator
- Analog output options: Charge Sensitive, I-toV, TTL
- Gain compensation over a wide temperature range
- Option for watertight package and connectors
Standard Configurations Integrated with SiPM, Pre-amplifier, and High Voltage Power Supply
| Scintillator | Model |
Scintillator Dimensions |
Electronics |
PHR Specifications |
Sales Drawing | Request Quote |
|---|---|---|---|---|---|---|
| NaI(Tl) | Si38.1NI38.1D80 | 1.5" diameter x 1.5" | I to V Positive | ≤ 8% | 690-1113 | Click here |
| NaI(Tl) | Si38.1NI38.1B80 | 1.5" diameter x 1.5" | Charge Sensitive Positive | ≤ 8% | 690-1119 | Click here |
| NaI(Tl) | Si50.8NI50.8D75 | 2" diameter x 2" | I to V Positive | ≤ 7.5% | 690-1100-16-00 | Click here |
| NaI(Tl) | Si50.8NI50.8B75 | 2" diameter x 2" | Charge Sensitive Positive | ≤ 7.5% | 690-1065-16-00 | Click here |
| NaI(Tl) | Si76.2NI76.2D85 | 3" diameter x 3" | I to V Positive | ≤ 8.5% | 690-1105 | Click here |
| NaI(Tl) | Si76.2NI76.2B85 | 3" diameter x 3" | Charge Sensitive Positive | ≤ 8.5% | 690-1096 | Click here |
| USB | USB OUTPUT ADAPTER, SiPM ANALOG | 690-1071 | Click here | |||
| Scintillator | Model |
Scintillator Dimensions |
Electronics |
PHR Specifications |
Sales Drawing | Request Quote |
|---|---|---|---|---|---|---|
| NaIL | Si50.8NL50.8D75 | 2" diameter x 2" | I to V Positive | ≤ 7.5% | 690-1081-16-00 | Click here |
| NaIL | Si50.8NL101.6D80 | 2" diameter x 2" | I to V Positive | ≤ 8% | 690-1109 | Click here |
| NaIL | Si76.2NL76.2D85 | 3" diameter x 3" | I to V Positive | ≤ 8.5% | 690-1102 | Click here |
| NaIL | Si50.8X101.6NL101.6D85 | 2" X 4" X 4" | I to V Positive | ≤ 8.5% | TBD | Click here |
| USB | USB OUTPUT ADAPTER, SiPM ANALOG | 690-1071 | Click here | |||
| Scintillator | Model |
Scintillator Dimensions |
Electronics |
PHR Specifications |
Sales Drawing | Request Quote |
|---|---|---|---|---|---|---|
| LaBr3 | Si38.1BL38.1D40 | 1.5" diameter x 1.5" | I to V Positive | ≤ 4% | 690-1118 | Click here |
| Enhanced LaBr | Si38.1BE38.1D35 | 1.5" diameter x 1.5" | I to V Positive | ≤ 3.5% | 690-1142 | Click here |
VIDEO
Depending on the application, we are able to adapt and optimize SiPM quantity and layout on the crystal in order to achieve optimum design and performance tradeoffs.